Compiling process started (2024-01-29 10:53:45), please wait...<br><font color="blue">
------------------------------------------------hil0------------------------------------------------</font><br><font color="blue">Compiling model for device with id 0 
</font><br><font color="blue">PWM Modulators scheduling completed.</font><br><font color="green"><font color=blue><br>Circuit is divided into 4 subcircuits.<br></font></font><br><font color="green"><font color=blue>Partial list of components in subcircuit (SPC) 0:</font></font><br><font color="green"><font color=blue>   <a href='show://component/Vdc1'>Vdc1</a></font></font><br><font color="green"><font color=blue>   <a href='show://component/Lfb1'>Lfb1</a></font></font><br><font color="green"><font color=blue>   <a href='show://component/3ph_inverter 1'>3ph_inverter 1</a></font></font><br><font color="green"> </font><br><font color="green"><font color=blue>Partial list of components in subcircuit (SPC) 1:</font></font><br><font color="green"><font color=blue>   <a href='show://component/3ph_inverter 2'>3ph_inverter 2</a></font></font><br><font color="green"><font color=blue>   <a href='show://component/Idc2'>Idc2</a></font></font><br><font color="green"><font color=blue>   <a href='show://component/Lfb2'>Lfb2</a></font></font><br><font color="green"> </font><br><font color="green"><font color=blue>Partial list of components in subcircuit (SPC) 2:</font></font><br><font color="green"><font color=blue>   <a href='show://component/E3'>E3</a></font></font><br><font color="green"><font color=blue>   <a href='show://component/3ph_inverter 3'>3ph_inverter 3</a></font></font><br><font color="green"><font color=blue>   <a href='show://component/grid_contactor 3'>grid_contactor 3</a></font></font><br><font color="green"> </font><br><font color="green"><font color=blue>Partial list of components in subcircuit (SPC) 3:</font></font><br><font color="green"><font color=blue>   <a href='show://component/Rfc1'>Rfc1</a></font></font><br><font color="green"><font color=blue>   <a href='show://component/Ra1'>Ra1</a></font></font><br><font color="green"><font color=blue>   <a href='show://component/Vgrid2_c'>Vgrid2_c</a></font></font><br><font color="green"> </font><br><font color="blue">Communication lines scheduling completed.</font><br><font color="blue">
Running Device specific hw utilization analysis:</font><br><font color="blue">	Standard processing core utilization:		4 out of 4	100.0%</font><br><font color="blue">	Machine solver utilization:          		0 out of 0	0.0%</font><br><font color="blue">	DC-DC converter solvers utilization: 		0 out of 0	0.0%</font><br><font color="blue">	Signal generator utilization:        		6 out of 12	50.0%</font><br><font color="blue">	Look up tables utilization:          		3 out of 8	37.5%</font><br><font color="blue">	PWM modulator utilization:   				0 out of 12	0.0%</font><br><font color="blue">	PWM analyzer utilization:    				0 out of 0	0.0%</font><br><font color="blue">	Parallel DTV Conv. Detectors utilization:	0 out of 0	0.0%</font><br><font color="blue">
Running core0 specific hardware utilization analysis:</font><br><font color="blue">	Power Electronics Converters utilization:	3 out of 3	100.0%</font><br><font color="blue">	Contactor utilization:                   	1 out of 6	16.67%</font><br><font color="blue">	TVE solvers utilization:                 	0 out of 16	0.0%</font><br><font color="blue">	SP sources utilization:                  	0 out of 16	0.0%</font><br><font color="blue">	Delayed controlled sources utilization:  	0 out of 12	0.0%</font><br><font color="blue">	Non-ideal switches utilization:          	0 out of 0	0.0%</font><br><font color="blue">
Running core1 specific hardware utilization analysis:</font><br><font color="blue">	Power Electronics Converters utilization:	3 out of 3	100.0%</font><br><font color="blue">	Contactor utilization:                   	1 out of 6	16.67%</font><br><font color="blue">	TVE solvers utilization:                 	0 out of 16	0.0%</font><br><font color="blue">	SP sources utilization:                  	0 out of 16	0.0%</font><br><font color="blue">	Delayed controlled sources utilization:  	0 out of 12	0.0%</font><br><font color="blue">	Non-ideal switches utilization:          	0 out of 0	0.0%</font><br><font color="blue">
Running core2 specific hardware utilization analysis:</font><br><font color="blue">	Power Electronics Converters utilization:	3 out of 3	100.0%</font><br><font color="blue">	Contactor utilization:                   	1 out of 6	16.67%</font><br><font color="blue">	TVE solvers utilization:                 	0 out of 16	0.0%</font><br><font color="blue">	SP sources utilization:                  	0 out of 16	0.0%</font><br><font color="blue">	Delayed controlled sources utilization:  	0 out of 12	0.0%</font><br><font color="blue">	Non-ideal switches utilization:          	0 out of 0	0.0%</font><br><font color="blue">
Running core3 specific hardware utilization analysis:</font><br><font color="blue">	Power Electronics Converters utilization:	0 out of 3	0.0%</font><br><font color="blue">	Contactor utilization:                   	2 out of 6	33.33%</font><br><font color="blue">	TVE solvers utilization:                 	0 out of 16	0.0%</font><br><font color="blue">	SP sources utilization:                  	0 out of 16	0.0%</font><br><font color="blue">	Delayed controlled sources utilization:  	0 out of 12	0.0%</font><br><font color="blue">	Non-ideal switches utilization:          	0 out of 0	0.0%</font><br><font color="blue">
Forward voltage drop unit scheduling completed.</font><br><font color="blue">
Forward voltage drop unit scheduling completed.</font><br><font color="blue">
Forward voltage drop unit scheduling completed.</font><br><font color="blue">
Forward voltage drop unit scheduling completed.</font><br><font color="blue">
Machine losses calculation scheduling completed.</font><br><font color="blue">
Calculating continuous state space matrices for core0...</font><br><font color="blue">
Calculating continuous state space matrices for core1...</font><br><font color="blue">
Calculating continuous state space matrices for core2...</font><br><font color="blue">
Calculating continuous state space matrices for core3...</font><br><font color="blue">
Discretization of state space matrices...</font><br><font color="blue">Simulation step set to 	 2e-06 s</font><br><font color="blue">Scaled discretization step set to 	 2e-06 s</font><br><font color="blue">Report bad ff measurements:</font><br><font color="green">There aren't bad ff measurements.
</font><br><font color="blue">Simulation step set to 	 2e-06 s</font><br><font color="blue">Scaled discretization step set to 	 2e-06 s</font><br><font color="blue">Report bad ff measurements:</font><br><font color="green">There aren't bad ff measurements.
</font><br><font color="blue">Simulation step set to 	 2e-06 s</font><br><font color="blue">Scaled discretization step set to 	 2e-06 s</font><br><font color="blue">Report bad ff measurements:</font><br><font color="green">There aren't bad ff measurements.
</font><br><font color="blue">Simulation step set to 	 2e-06 s</font><br><font color="blue">Scaled discretization step set to 	 2e-06 s</font><br><font color="blue">Report bad ff measurements:</font><br><font color="green">There aren't bad ff measurements.
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Memory utilization analysis...</font><br><font color="blue">	Matrix memory utilization of core0 is 		25.05%</font><br><font color="blue">	Matrix memory utilization of core1 is 		25.05%</font><br><font color="blue">	Matrix memory utilization of core2 is 		25.05%</font><br><font color="blue">	Matrix memory utilization of core3 is 		10.13%</font><br><font color="blue">
Timing constraint analysis...</font><br><font color="blue">	Time slot utilization of core0 is 	12.32%</font><br><font color="blue">	Time slot utilization of core1 is 	12.32%</font><br><font color="blue">	Time slot utilization of core2 is 	12.32%</font><br><font color="blue">	Time slot utilization of core3 is 	24.82%</font><br><font color="blue">	Time slot utilization of other functional units is 	10.18%</font><br><font color="blue">Timing constraints met!</font><br><font color="blue">
Losses calculation scheduling completed.</font><br><font color="blue">
Machine dynamic model scheduling completed.</font><br><font color="blue">
Writing device configuration files...</font><br><font color="green">
Electrical part of compiler successfully finished.
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Starting code generation for system 0 CPU</font><br><font color="blue">	Signal processing IO variables utilization:   	0 out of 4194304</font><br><font color="blue">	Signal processing Probes utilization: 			5 out of 1024</font><br><font color="blue">	Signal processing Digital Probes utilization: 	0 out of 512</font><br><font color="blue">	Signal processing tunable parameters utilization: 0 out of 0</font><br><font color="blue">	C code generated successfully!</font><br><font color="blue">	Starting compilation of generated C code...</font><br><font color="blue">	Total utilization of the internal memory: 	1080 out of 16384 kB (6.59%)</font><br><font color="blue">		Code segment size:						41 out of 16384 kB (0.26%)</font><br><font color="blue">		Data segment size:						1038 out of 16384 kB (6.34%)</font><br><font color="blue">	C code compilation was successful!
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Starting code generation for user 0 CPU</font><br><font color="blue">	Signal processing IO variables utilization:   	0 out of 4194304</font><br><font color="blue">	Signal processing Probes utilization: 			4 out of 1019</font><br><font color="blue">	Signal processing Digital Probes utilization: 	0 out of 512</font><br><font color="blue">	Signal processing tunable parameters utilization: 0 out of 4194304</font><br><font color="blue">	C code generated successfully!</font><br><font color="blue">	Starting compilation of generated C code...</font><br><font color="blue">	Total utilization of the external memory: 	1078 out of 16384 kB (6.58%)</font><br><font color="blue">		Code segment size:						40 out of 16384 kB (0.25%)</font><br><font color="blue">		Data segment size:						1037 out of 16384 kB (6.34%)</font><br><font color="blue">	C code compilation was successful!
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Compiling model for device with id 0 finished successfully</font><br><font color="blue">----------------------------------------------------------------------------------------------------</font><br><font color="green">
Compilation finished successfully.</font><br>Compiling process finished.<br>